The PCA9846 is an ultra-low voltage, quad bidirectional translating switch controlled via theI2C-bus. The SCL/SDA upstream pair fans out to four downstream pairs, orchannels. Any or all SCx/SDx channels can be selected, determined by the programmablecontrol register. This feature allows multiple devices with the same I2C-busaddress to reside on the same bus. The switch device can also separate a heavily loadedI2C-bus into separate bus segments, eliminating the need for a busbuffer.

An active LOW reset input allows the PCA9846 to recover from a situation where one of thedownstream I2C-buses is stuck in a LOW state. Pulling the RESET pin LOW resets the I2C-bus state machineand deselects all the channels, as does the internal Power-On Reset (POR) function.

The pass gates of the switches are constructed such that the VDD1 pin is usedto limit the maximum high voltage which is passed by the PCA9846. This allows the use ofdifferent bus voltages on each channel, so that 0.8 V, 1.8 V, 2.5 V or 3.3 V parts cancommunicate without any additional protection. External pull-up resistors pull the busup to the desired voltage level for each channel. All I/O pins are 3.6 V tolerant.

• Ultra-low voltage operation, down to 0.8 V to interface with next-generation CPUs
• 1-of-4 bidirectional translating switch
• Fm+ I2C-bus interface logic; compatible with SMBus standards
• 2 address pins allowing up to 16 devices on the I2C-bus
• Channel selection via I2C-bus
• Power-up with all switch channels deselected
• Low Ron switches
• Allows voltage level translation between 0.8 V, 1.8 V, 2.5 V and 3.3 V buses
• Reset via I2C-bus software command
• I2C Device ID function
• No glitch on power-up
• Supports hot insertion since all channels are de-selected at power-on
• Low standby current
• 3.6 V tolerant inputs
• 0 Hz to 1 MHz clock frequency
• ESD protection exceeds 6000 V HBM per JESD22-A114 and 1000 V CDM perJESD22-C101
• Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
• Two packages offered: TSSOP16 and HVQFN16