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PCA9847PW产品应用图解:
PCA9847PW产品封装图一
NXP产品 - PCA9847PW介绍
PCA9847PW - 8-channel ultra-low voltage, Fm+ I2C-bus multiplexer with reset

PCA9847PW是NXP公司的一款I²C增强快速模式产品,PCA9847PW是8-channel ultra-low voltage, Fm+ I2C-bus multiplexer with reset,本站介绍了PCA9847PW的封装应用图解、特点和优点、功能等,并给出了与PCA9847PW相关的NXP元器件型号供参考。

PCA9847PW - 8-channel ultra-low voltage, Fm+ I2C-bus multiplexer with reset - I²C增强快速模式 - I²C - 恩智浦, LLC

产品描述

The PCA9847 is an ultra-low voltage, octal bidirectional translating multiplexer controlled viathe I2C-bus. The SCL/SDA upstream pair fans out to eight downstream pairs, orchannels. Any single SCx/SDx channel can be selected, determined by the programmablecontrol register. This feature allows multiple devices with the same I2C-busaddress to reside on the same bus. The multiplexer device can also separate a heavilyloaded I2C-bus into separate bus segments, eliminating the need for a busbuffer.

An active LOW reset input allows the PCA9847 to recover from a situation where one of thedownstream I2C-buses is stuck in a LOW state. Pulling the RESET pin LOW resets the I2C-bus state machineand deselects all the channels, as does the internal Power-On Reset (POR) function.

The pass gates of the multiplexers are constructed such that the VDD1 pin isused to limit the maximum high voltage which is passed by the PCA9847. This allows theuse of different bus voltages on each channel, so that 0.8 V, 1.8 V, 2.5 V or 3.3 Vparts can communicate without any additional protection. External pull-up resistors pullthe bus up to the desired voltage level for each channel. All I/O pins are 3.6 Vtolerant.

产品特性和优势
  • Ultra-low voltage operation, down to 0.8 V to interface with next-generation CPUs
  • 1-of-8 bidirectional translating multiplexer
  • Fm+ I2C-bus interface logic; compatible with SMBus standards
  • Active LOW reset input
  • 2 address pins allowing up to 16 devices on the I2C-bus
  • Channel selection via I2C-bus
  • Power-up with all multiplexer channels deselected
  • Low Ron switches
  • Allows voltage level translation between 0.8 V, 1.8 V, 2.5 V and 3.3 V buses
  • Reset via I2C-bus software command
  • I2C Device ID function
  • No glitch on power-up
  • Supports hot insertion since all channels are de-selected at power-on
  • Low standby current
  • 3.6 V tolerant inputs
  • 0 Hz to 1 MHz clock frequency
  • ESD protection exceeds 6000 V HBM per JESD22-A114 and 1000 V CDM perJESD22-C101
  • Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
  • Two packages offered: TSSOP24 and HVQFN24
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