PTN3356R1BS是NXP公司的一款高速多路复用器产品,PTN3356R1BS是ROM-based low-power DisplayPort to VGA adapter,本站介绍了PTN3356R1BS的封装应用图解、特点和优点、功能等,并给出了与PTN3356R1BS相关的NXP元器件型号供参考。
PTN3356R1BS - ROM-based low-power DisplayPort to VGA adapter - 高速多路复用器 - DisplayPort - 恩智浦, LLC
PTN3356R1 is a ROM-based DisplayPort to VGA adapter optimized primarily for motherboardapplications, to convert a DisplayPort signal from the chip set to an analog videosignal that directly connects to the VGA connector. PTN3356R1 integrates a DisplayPortreceiver, a high-speed triple video digital-to-analog converter that supports a widerange of display resolutions, for example, VGA to WUXGA.
PTN3356R1 supports two DisplayPort lanes operating at either 2.7 Gbit/s or 1.62 Gbit/sper lane.
PTN3356R1 supports I2C-bus over AUX per DisplayPort standard, and bridges theVESA DDC channel to the DisplayPort Interface.
PTN3356R1 is powered from a 3.3 V power supply and consumes approximately 200 mW of powerfor video streaming in WUXGA resolution and 410 μW of power in Low-power mode. The VGAoutput is powered down when there is no valid DisplayPort source data being transmitted.PTN3356R1 also aids in monitor detection by performing load sensing on RGB lines andreporting sink connection status to the source.
VESA-compliant DisplayPort converter
- Main Link: 1-lane and 2-lane modes supported
- HBR (High Bit Rate) at 2.7 Gbit/s per lane
- RBR (Reduced Bit Rate) at 1.62 Gbit/s per lane
- BER (Bit Error Rate) better than 10-9
- DisplayPort Link down-spreading supported
- 1 MHz AUX channel
- Supports native AUX CH syntax
- Supports I2C-bus over AUX CH syntax
- Active HIGH Hot Plug Detect (HPD) signal to the source
VESA-compliant eDP extensions
- Supports Alternate Scrambler Seed Reset (ASSR)
- Supports Alternate Enhanced Framing mode - Enhanced Framing
DDC channel output
- I2C-Over-AUX feature facilitates support of MCCS, DDC/CI, and DDCprotocols
Analog video output
- VSIS 1.2 compliance for supported video output modes
- Analog RGB current-source outputs
- 3.3 V VSYNC and HSYNC outputs
- Pixel clock up to 240 MHz
- Triple 8-bit Digital-to-Analog Converter (DAC)
- Direct drive of double terminated 75 Ω load with standard 700 mV (peak-to-peak)signals
General features
- Monitor presence detection through load detection scheme.Connection/disconnection reported via HPD IRQ and DPCD update
- Wide set of display resolutions are supported:
- 1920 x 1440, 60 Hz, 18 bpp, 234 MHz pixel clock rate
- 2048 x 1152, 60 Hz (reduced blanking), 24 bpp, 162 MHz pixel clockrate
- 2048 x 1536, 50 Hz (reduced blanking), 24 bpp, 167.2 MHz pixel clockrate
- WUXGA: 1920 x 1200, 60 Hz, 18 bpp, 193 MHz pixel clock rate
- WUXGA: 1920 x 1200, 60 Hz (reduced blanking), 24 bpp, 154 MHz pixel clockrate
- UXGA: 1600 x 1200, 60 Hz, 162 MHz pixel clock rate
- SXGA: 1280 x 1024, 60 Hz, 108 MHz pixel clock rate
- XGA: 1024 x 768, 60 Hz, 65 MHz pixel clock rate
- SVGA: 800 x 600, 60 Hz, 40 MHz pixel clock rate
- VGA: 640 x 480, 60 Hz, 25 MHz pixel clock rate
- Any resolution and refresh rates are supported from 25 MHz up to 180 MHzpixel clock rate at 24 bpp, or up to 240 MHz pixel clock rate at 18bpp
- Bits per color (bpc) supported
- 6, 8 bits supported
- 10, 12, 16 bits supported by truncation to 8 MSBs
- All VGA colorimetry formats (RGB) supported
- Power modes:
- Active-mode power consumption: ~200 mW at WUXGA, 1920 x 1200, 60 Hz (18bpc)
- 410 μW at Low-power mode
- Supports flexible choice of timing reference
- On-board oscillator with external crystal, ceramic resonator
- Different frequencies supported: 24 MHz, 25 MHz, 27 MHz
- ESD protection: 7 kV HBM
- Single power supply (3.3 V) for easy integration in the platforms
- Commercial temperature range: 0 °C to 85 °C
- 32-pin HVQFN, 5 mm x 5 mm x 0.85 mm (nominal); 0.5 mm pitch; lead-freepackage
- Notebook computers, tablets and desktop PCs
- Dongles, adapters, docking stations